1. Field of the Invention
The invention relates to a chemical vapor deposition method for depositing thin film on a substrate and, more particularly, to a chemical vapor deposition method for depositing a Si-containing material, an organic material, a graded organosilicon-containing material, or a mixture thereof on a substrate.
2. Description of Related Art
As is known to those in the semiconductor art, interconnect delay is a major limiting factor in the drive to improve the speed and performance of integrated circuits (IC). One way to minimize interconnect delay is to reduce inter-connect capacitance by using low dielectric constant (low-k) materials as the insulating dielectric for metal wires in the IC devices. Thus, in recent years, low-k materials have been developed to replace relatively high dielectric constant insulating materials, such as silicon dioxide. In particular, low-k films are being utilized for inter-level and intra-level dielectric layers between metal wires in semiconductor devices.
Additionally, in order to further reduce the dielectric constant of insulating materials, material films are formed with pores, i.e., porous low-k dielectric films. Such low-k films can be deposited by a spin-on dielectric (SOD) method similar to the application of photo-resist, or by chemical vapor deposition (CVD). Thus, the use of low-k materials is readily adaptable to existing semiconductor manufacturing processes. However, low-k films and, more specifically, porous low-k films have suffered integration problems including, but not limited to, poor thermal and mechanical performance, copper migration, damage during pattern etching, etc.
Furthermore, in yet another attempt to reduce the dielectric constant of insulating materials, air-gap structures are contemplated. According to one approach, air-gap structures are formed by depositing a sacrificial material on a substrate and then depositing a bridging material over the sacrificial material. Thereafter, at a later point in the device manufacturing process following metallization and planarization, the sacrificial material is decomposed and removed in order to leave a gap or void in its absence.
As an example, FIGS. 1A through 1E illustrate a procedure for preparing an air gap structure 5. As shown in FIG. 1A, the procedure comprises forming an inter-level dielectric (ILD) layer 10 on a substrate (not shown). Thereafter, a sacrificial layer 20 is formed on the ILD layer 10, and a cap layer 30 is formed on the sacrificial layer 20. In FIG. 1B, a pattern 40 is transferred to the sacrificial layer 20 and the cap layer 30 using, for instance, a series of lithography and etching processes. The pattern 40 may correspond to the metal line pattern to be formed on the ILD layer 10.
In FIG. 1C, the pattern 40 is metalized to form a metal interconnect 50. The metal interconnect 50 may comprise metal lines 52, and a barrier layer 54 disposed between the metal lines 52 and the sacrificial layer 20 and the cap layer 30. For instance, the barrier layer 54 may reduce migration of the metal from metal lines 52 to the sacrificial layer 20 and the cap layer 30. The metallization of pattern 40 may comprise a series of deposition processes, and a planarization or polishing process.
In FIG. 1D, the sacrificial layer 20 is decomposed and removed from air gap structure 5 to leave air gaps 22. Thereafter, as shown in FIG. 1E, a metal line cap layer 12 may be formed and a second ILD layer 14 may be formed on the metal line cap layer 12. Conventionally, the sacrificial layer 20 is removed using a chemical or thermal process. Thus, the sacrificial layer 20 plays the role of template or “void precursor”, wherein the void is formed upon decomposition of the sacrificial material by thermal treatment and diffusion of the decomposition products out of the multilayer assembly. Thermally degradable polymers have been a preferred choice for use as a sacrificial material.
A common technique for forming porous or non-porous low-k or ultra-low-k films for use in conventional metal interconnects or advanced metal interconnects incorporating airgap structures includes a vapor deposition process. Vapor deposition processes may include chemical vapor deposition (CVD) and plasma enhanced CVD (PECVD). For example, in a CVD process, a continuous stream of film precursor vapor is introduced to a process chamber containing a substrate, wherein the composition of the film precursor has the principal atomic or molecular species found in the film to be formed on the substrate. During this continuous process, the precursor vapor is chemisorbed on the surface of the substrate while it thermally decomposes and reacts with or without the presence of an additional gaseous component that assists the reduction of the chemisorbed material, thus, leaving behind the desired film. However, when using CVD processes, the substrate temperature necessary for thermally decomposing the precursor vapor can be very high, generally in excess of 400 degrees C. which, among other things, adds to the thermal budget for the substrate.
Additionally, for example, in a PECVD process, the CVD process further includes plasma that is utilized to alter or enhance the film deposition mechanism. For instance, plasma excitation can allow film-forming reactions to proceed at temperatures that are lower than those typically required to produce a similar film by thermally excited CVD. In addition, plasma excitation may activate film-forming chemical reactions that are not energetically or kinetically favored in thermal CVD. However, when using PECVD processes, the substrate temperature may still be high and its contribution to the thermal budget for the substrate may be excessive. Further, the use of plasma can lead to plasma-induced damage, including both physical and/or electrical damage arising from ion bombardment. Moreover, the use of plasma leads to uncontrolled dissociation of the precursor vapor, which, among other things, leads to poor film morphology.